Weeroc

Catiroc 1

Large-Photomultiplier-Arrays Read-Out Chip

Description

Catiroc 1 is a 16-channel front-end ASIC designed to readout photomultiplier tubes (PMTs) in large scale applications such as water Cerenkov experiments. The concept of the ASIC is to combine an auto-trigger chip to 16 PMTs to obtain an autonomous macro-cell for large area of detection.
An adjustment of the gain of each channel compensates for the gain variation of the PMTs and allows using only one HV cable for the 16 PMTs. In the ASIC, the 16 channels are totally independent. In each channel, the auto-trigger starts the charge and time measurements which are then converted and stored. Only the hit channels are read out by one serialized output. The time measurement is done by a 26-bit counter at 40 MHz for the coarse time and a Time to Amplitude Converter (TAC) for the fine time, giving a resolution of 200ps RMS. The charge measurement is done by a dual gain preamplifier followed by a shaper with variable shaping times (25 ns, 50 ns or 100 ns). Charge and fine time values are converted by a 10 bit ADC.
Moreover Catiroc 1 can be used as an analogue front-end ASIC for PMTs. The 16 triggers and 16 shapers output can be used in an application specific optimized front-end board.

Parameters

ParametersValue
TRLTechnology Readiness Level 5 - First measurement conclusive in lab
Available versions

Catiroc 1 : available

Detector Read-Out PMT, PMT array
Number of Channel16
Signal Polarity Negative
SensitivityTrigger on 1/3 of photo-electron on each channel
Timing Resolution 200ps RMS on single photo-electron
Dynamic Range400 photo-electrons (106 PMT gain), Integral Non Linearity 1% up to 400 p-e
Packaging & Dimension

TQFP 208 28x28mm

Power Consumption 21 mW / channel - supply voltage 3.3V
Inputs 16 voltage inputs
Outputs

- 16 trigger outputs

- 16 shaper output

- 1 or of the 16 trigger output

- 1 serialized digital data output (50bits/channel)

Internal Programmable Features

- 16 channel gain adjustment (16x8bits)

- trigger and gain threshold adjustment (2x10bits)

- charge measurement tuning

- 16 trigger masks

- channel by channel trigger output enable

Evaluation systems

Evaluation board : Available

Diagram

Downloads

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Salleh Ahmad

catiroc@weeroc.com

Downloads

DISTRIBUTION NETWORK

All weeroc products are distributed worldwide by CAEN.

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Design review

Weeroc provide free support to review your board design integrating one of our ASIC. Get in touch with our engineering team to ensure a first-time-good design of your front-end electronics.