Weeroc

Psiroc

PIN Diodes, Silicon Strips and GEMs Read-Out Chip

Description

Psiroc is a 64-channel front-end ASIC designed to readout PIN diodes, silicon strips and GEMs, handling detector capacitances ranging from 0 up to few hundreds of pF.

Psiroc allows triggering down to 0.5 fC on sub-20pF detector capacitances and provides dual-gain energy measurement with excellent Signal-to-Noise Ratio on the high gain (SNR over 10 for 0.5 fC) and large dynamic range on the low gain. For input signals over few pC a channel-wise ToT output is also available. Psiroc can be programmed to output the shapers HG/LG, individual triggers or ToT signals (two output pins per channels). The preamplifier gain is adjustable from 125 mV/pC up to 4 V/pC.

Charge measurement is done with peak detectors but those can be used in a track & hold fashion thanks to an internal delay cell. Analog data are outputted on two multiplexed analog output and can be read-out with an external ADC. Shapers shaping time can be adjusted from 20 ns to 3 µs with a step of 20 ns up to 300 ns and a step of 200 ns up to 3 µs. Data acquisition can be done ASIC wide or channel-wise.

Channel-by-channel calibration on the trigger thresholds for time trigger and ToT can be done with individual 6-bit DACs.

Parameters

ParametersValue
TRLTechnology Readiness Level 4 - ASIC validated in lab environment
Available versions

Psiroc 1: available March 2024

Detector Read-Out PIN Diodes, Silicon strips, GEMs
Number of Channel64
Signal Polarity Positive, Negative
SensitivityTrigger on 0.5 fC on both polarity
Timing Resolution < 150 ps RMS @ Qin = 4 fC ; Cd/Cf = 20p/1p (pa gain = 1 V/pC)
Dynamic RangeUp to 5 pC with low gain charge measurement and up to 100 pC with ToT
Packaging & Dimension

BGA 20x20 mm2

Power Consumption 350 mW – Supply voltage : 1.2 V
Inputs 64 analogue inputs
Outputs

- 2 outputs per channel, either :

  • 64 LVDS triggers
  • 2 x 64 TTL triggers
  • 64 TTL triggers and 64 analog outputs

- 2 multiplexed analogue outputs
- 3 NOR64 trigger outputs

Internal Programmable Features

- 3 trigger threshold tuning (10bits)

- channel-by-channel gain and shaping time adjustment (τ = 20 ns to 3 µs)

- individual trigger masking and cell powering

Evaluation systems

- Evaluation board : Available April 2024

- Psiroc + PicoTDC evaluation system : Available April 2024

Diagram

Psiroc is a GenerIC family IC

GenerIC is a new read-out chip family by Weeroc. GenerIC features fast flip-chip packaged integrated circuits pin-to-pin compatible one with another. Changing detector and its front-end electronic become straightforward with GenerIC family. Pin to pin compatibility allow keeping the same front-end electronics and change detector and front-end ASIC while keeping downstream data stream identical. GenerIC makes easy multi-detector read-out by having a common read-out scheme independant of the detector. Check the GenerIC family :

Downloads

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Jean-Baptiste Cizel

psiroc@weeroc.com

Downloads

DISTRIBUTION NETWORK

All weeroc products are distributed worldwide by CAEN.

Please contact your local representative or get in touch with us.

Design review

Weeroc provide free support to review your board design integrating one of our ASIC. Get in touch with our engineering team to ensure a first-time-good design of your front-end electronics.